Device performance in conventional and strained Si n-MOSFETs with high-κ gate stacks
نویسنده
چکیده
Based on comprehensive calibration to experimental device characteristics, Monte Carlo simulations have been performed to assess the device performance of sub100nm Si and strained Si MOSFETs with high-κ dielectrics, with and without consideration of soft optical phonon scattering induced by the introduction of high-κ dielectrics. The impact of interface roughness scattering on the performance enhancement of strained Si MOSFETs has also been evaluated.
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تاریخ انتشار 2004